Intrin

Usage

use Intrin;

or

import Intrin;
proc vectorType(type eltType, param numElts: int) type
proc implType(type eltType, param numElts: int) type
proc extract(type eltType, param numElts: int, x: vectorType(eltType, numElts), param idx: int) : eltType

idx 0 is the least significant element

proc insert(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: eltType, param idx: int) : x.type

idx 0 is the least significant element

proc splat(type eltType, param numElts: int, x: eltType) : vectorType(eltType, numElts)
proc set(type eltType, param numElts: int, values: numElts*eltType) : vectorType(eltType, numElts)

values(0) is the least significant element

proc loadAligned(type eltType, param numElts: int, ptr: c_ptrConst(eltType)) : vectorType(eltType, numElts)
proc loadUnaligned(type eltType, param numElts: int, ptr: c_ptrConst(eltType)) : vectorType(eltType, numElts)
proc storeAligned(type eltType, param numElts: int, ptr: c_ptr(eltType), x: vectorType(eltType, numElts))
proc storeUnaligned(type eltType, param numElts: int, ptr: c_ptr(eltType), x: vectorType(eltType, numElts))
proc loadMasked(type eltType, param numElts: int, ptr: c_ptrConst(eltType), mask: ?) : vectorType(eltType, numElts)

Load with a mask masked out elements are zeroed out only the most significant bit in each vector lane is considered for the mask

proc gather(type eltType, param numElts: int, ptr: c_ptrConst(eltType), type indexType, indices: ?, param scale: int) : vectorType(eltType, numElts)
proc gatherMasked(type eltType, param numElts: int, ptr: c_ptrConst(eltType), type indexType, indices: ?, param scale: int, mask: ?, src: vectorType(eltType, numElts)) : vectorType(eltType, numElts)
proc shiftLeft(type eltType, param numElts: int, x: vectorType(eltType, numElts), param shift: int) : x.type

Shifts the elements in each lane to the left by ‘shift’ bits. Zeroes are shifted in.

proc shiftLeft(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type) : x.type
proc shiftRight(type eltType, param numElts: int, x: vectorType(eltType, numElts), param shift: int) : x.type

Shifts the elements in each lane to the right by ‘shift’ bits. This treats all elements as unsigned values and performs a logical shift (zeroes are shifted in).

proc shiftRight(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type) : x.type
proc shiftRightArith(type eltType, param numElts: int, x: vectorType(eltType, numElts), param shift: int) : x.type

Shifts the elements in each lane to the right by ‘shift’ bits. This treats all elements as signed values and performs an arithmetic shift (sign bit is replicated).

proc shiftRightArith(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type) : x.type
proc swapPairs(type eltType, param numElts: int, x: vectorType(eltType, numElts)) : x.type
proc swapLowHigh(type eltType, param numElts: int, x: vectorType(eltType, numElts)) : x.type
proc reverse(type eltType, param numElts: int, x: vectorType(eltType, numElts)) : x.type
proc rotateLeft(type eltType, param numElts: int, x: vectorType(eltType, numElts)) : x.type
proc rotateRight(type eltType, param numElts: int, x: vectorType(eltType, numElts)) : x.type
proc interleaveLower(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type) : x.type
proc interleaveUpper(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type) : x.type
proc deinterleaveLower(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type) : x.type
proc deinterleaveUpper(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type) : x.type
proc blendLowHigh(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type) : x.type
proc add(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type) : x.type
proc sub(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type) : x.type
proc mul(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type) : x.type
proc div(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type) : x.type
proc neg(type eltType, param numElts: int, x: vectorType(eltType, numElts)) : x.type
proc and(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type) : x.type
proc or(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type) : x.type
proc xor(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type) : x.type
proc not(type eltType, param numElts: int, x: vectorType(eltType, numElts)) : x.type
proc andNot(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type) : x.type

(~x) & y

proc cmpEq(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type) : x.type
proc cmpNe(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type) : x.type
proc cmpLt(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type) : x.type
proc cmpLe(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type) : x.type
proc cmpGt(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type) : x.type
proc cmpGe(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type) : x.type
proc bitSelect(type eltType, param numElts: int, mask: ?, x: vectorType(eltType, numElts), y: x.type) : x.type
proc isAllZeros(type eltType, param numElts: int, x: vectorType(eltType, numElts)) : bool
proc allOnes(type eltType, param numElts: int) : vectorType(eltType, numElts)
proc allZeros(type eltType, param numElts: int) : vectorType(eltType, numElts)
proc moveMask(type eltType, param numElts: int, x: vectorType(eltType, numElts)) : c_int
proc reinterpretCast(type fromEltType, param fromNumElts: int, type toEltType, param toNumElts: int, x: vectorType(fromEltType, fromNumElts)) : vectorType(toEltType, toNumElts)
proc typeCast(type fromEltType, param fromNumElts: int, type toEltType, param toNumElts: int, x: vectorType(fromEltType, fromNumElts)) : vectorType(toEltType, toNumElts)
proc hadd(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type) : x.type

Add pairs of adjacent elements

x: [a, b, c, d] y: [e, f, g, h]

returns: [a+b, e+f, c+d, g+h]

proc sqrt(type eltType, param numElts: int, x: vectorType(eltType, numElts)) : x.type
proc rsqrt(type eltType, param numElts: int, x: vectorType(eltType, numElts)) : x.type
proc fmadd(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type, z: x.type) : x.type

Performs (x*y)+z

proc fmsub(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type, z: x.type) : x.type

Performs (x*y)-z

proc min(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type) : x.type
proc max(type eltType, param numElts: int, x: vectorType(eltType, numElts), y: x.type) : x.type
proc abs(type eltType, param numElts: int, x: vectorType(eltType, numElts)) : x.type